Integrated circuits, for example memories, particularly integrated semiconductor memories, for example DRAMs (Dynamic Random Access Memory), semiconductor memories or flash memories, are subject to extensive function tests during and after their production in order to ensure the quality of the memories.
One such function test is what is known as the burn-in test. In a burn-in test of this kind, the memories or memory chips are stressed using increased voltages and/or increased temperatures in order to age the memories artificially, so that what is known as infant mortality is overcome.
Burn-in tests are usually tests over very long periods in large furnaces using a usually very low test clock rate, for example 5-10 MHz.
To increase the throughput of tested integrated circuits, for example memory chips, two approaches are conceivable in principle. A first approach relates to increasing the parallelism of the integrated circuits to be tested, for example memory chips, a second approach is based on reducing the test period or test times.